◄Summary► ◄Notes► ◄Back► ────────────────────────────────────────────────────────────────────────────── The feature bits are set from Input Status register 0 in response to an output on the specified Feature Control register bits: Feature Feature Control Input Status Bit(s) Output Bit Bit ═══════ ═══════════════ ════════════ 0 0 5 1 0 6 2 1 5 3 1 6 4-7 not used The bits in the switch settings byte indicate the state of the EGA's configuration DIP switch (1 =off, 0 =on). Bit Significance ═══ ══════════════════════ 0 configuration switch 1 1 configuration switch 2 2 configuration switch 3 3 configuration switch 4 4-7 not used -♦-